In recent years, there has been proposed a ReRAM (Resistive RAM) that utilizes as a memory a variable resistance element whose resistance value is reversibly changed. Moreover, in this ReRAM, a structure in which the variable resistance element is provided between a sidewall of a word line extending parallel to a substrate and a sidewall of a bit line extending perpendicularly to the substrate, is known. This structure has made possible an even higher degree of integration of a memory cell array. In the memory cell array of such a structure, a plurality of the bit lines are connected to one global bit line via a select transistor.